1. Field of the Invention
The present invention relates to technologies for determining a black level in an image signal.
2. Description of the Related Art
An image sensor generally has pixels shielded from light (optical black, hereinafter called OB pixels). A pixel signal output from this OB pixel is used for determining a signal level corresponding to black (hereinafter called a black level) (refer to, for example, Japanese Unexamined Patent Application Publication No. Hei 5-153429).
FIG. 1 is a block diagram showing an example of a conventional black level correcting device. As shown in the drawing, a black level correcting device 10 has a subtracter 12, a programmable amplifier 14 (a programmable gain amplifier, hereinafter abbreviated as PGA), a hold circuit 16, an A/D converter 18, a D/A converter 20, a reference setting section 24, a comparator 26, a switch 28, a sampling and holding section 32, and a subtracter 36.
The circuit operation of the black level correcting device 10 will be hereinafter described. To make description easier, a pixel except for the OB pixel, that is, a pixel for generating and accumulating signal charge in accordance with an amount of received light is written as “valid pixel” in this specification. After the subtracter 12 subtracts a signal level held by the hold circuit 16 (hereinafter called a hold level, described later in detail) from an analog pixel signal output from an image sensor 40, the PGA 14 amplifies the analog pixel signal. After that, the A/D converter 18 converts the pixel signal into a digital pixel value, and then the pixel value is input into the comparator 26, the sampling and holding section 32 and the subtracter 36.
The reference setting section 24 inputs a reference value (positive value) into the comparator 26. The reference value is a target value which indicates how much value a pixel signal of the OB pixel is expected to be just after A/D conversion. The comparator 26 outputs a result of subtracting the reference value from the pixel value. The switch 28 is turned on only when a pixel signal from a first OB pixel area in the image sensor 40 is input into the subtracter 12 (when an OB timing signal 1 in the drawing is at a high level).
When the switch 28 is on, the pixel value output from the comparator 26 is input into the D/A converter 20 to be converted into an analog signal, and then the analog signal is input into the hold circuit 16. The hold circuit 16 brings its hold level to an input signal level. The subtracter 12 subtracts the hold level from a pixel signal input from the image sensor 40. This operation is carried out in both cases where the pixel signals from the OB pixels of the image sensor 40 are output and where pixel signals of the valid pixels are output.
Since a negative feedback loop is formed by the subtracter 12 as described above, each pixel signal from the OB pixels is controlled so as to be ultimately converted into a pixel value equal to the reference value by A/D conversion. In other words, a convergence level of the hold level is a level of an analog signal obtained by converting, into an analog signal, “a value subtracting the reference value from a value into which each pixel signal of the OB pixels is simply converted by A/D conversion”. Here, “the value simply converted by the A/D conversion” is a value obtained in such a case where the pixel signals of the OB pixels are input into the A/D converter 18 through the PGA 14 without any subtraction by the subtracter 12 and converted by the A/D conversion.
Thus, the pixel value output from the A/D converter 18 is so controlled that the vicinity of the reference value becomes the black level (an average level of the pixel signals from the OB pixels). Therefore, it is prevented that a pixel signal in the vicinity of the black level is clipped to zero just after the A/D conversion. When a pixel signal from a second OB pixel area in the image sensor 40 is input into the subtracter 12 (an OB timing signal 2 in the drawing is at a high level), the sampling and holding section 32 holds a pixel value input from the A/D converter 18. The subtracter 36 subtracts the pixel value held by the sampling and holding section 32 from pixel values input from the A/D converter 18 to output results to a subsequent stage. The black level correcting device 10, as described above, makes the analog pixel signals input from the image sensor 40 into the digital pixel values having a black level of zero, and outputs them to the subsequent stage.
Since a circuit for processing an analog signal like this needs certain time to output a stable signal after the circuit is in an operating state, it is necessary to make the circuit in the operating state before taking a photograph. Thus, even in a state where no line is selected for reading out pixel signals, each switch of a vertical transfer section, a horizontal transfer section and the like in the image sensor 40 are turned on. Accordingly, the black level correcting device 10 is also operated to output a signal irrelevant to a photographed image (refer to, for example, Japanese Unexamined Patent Application Publication No. 2000-278616). This operation will be hereinafter called idling operation.
In a conventional method described above, the feedback for black level correction is always carried out irrespective of whether or not pixel signals after exposure are read out of the image sensor 40. Thus, if a signal level of the OB pixels during the idling operation is different from a signal level of the OB pixels at the start of readout after the exposure, the convergence level of the hold level during the idling operation differs from that during the readout of the pixel signals after the exposure. Therefore, when the readout of the pixel signals after the exposure is started, the hold level changes from “(the signal level of the OB pixels during the idling operation)—(a signal level into which the reference value is converted by D/A conversion)” to “(the signal level of the OB pixels after the exposure)—(the signal level into which the reference value is converted by the D/A conversion)”. It needs time, however, to change the hold level of the hold circuit 16 and stabilize the hold level to the convergence level.
Thus, at the start of the readout of the pixel signals after the exposure, the hold level of the hold circuit 16 is in a transitional state and varies. As a result, there is a problem of the occurrence of a sag (a direct-current standard level in the image signal varies because a time constant of a path is short).
Also, it is necessary to subtract the reference value added by the subtracter 12 in a previous stage for the purpose of preventing a pixel signal in the vicinity of the black level from being clipped to zero just after A/D conversion, in the subsequent stage. If the sag occurs, however, the reference value cannot be subtracted as-is. Thus, it becomes necessary to subtract the reference value after the sampling and holding section 32 samples variation in the level again (digital clamp). As a result, there is a problem that the structure of the circuit is complicated.